1. Field of the Invention
This invention relates to a read only memory module in which the storage elements are arranged between column lines and row lines, and more particularly to providing an equal access time in such a module for all storage elements thereof.
2. Description of the Prior Art
In programmable read only memories, for example, storage elements are arranged in a matrix form at the intersections of row lines and column lines. The storage elements may consist of a circuit element and an interruptable resistor. The circuit element may be a transistor or a diode, as an example of construction. The interruptable resistor, hereinafter called a memory resistor, may be manufactured from NiCr, for example. If information is to be written into the programmable read only memory, the interruptable resistors are to be interrupted corresponding to the information which is to be stored. For example, a binary "1" corresponds to an interrupted resistor, whereas a binary "0" corresponds to an uninterrupted resistor. The interruption of the resistors takes place by sending a correspondingly large current therethrough. This made possible by applying a correspondingly large voltage to the storage elements and effecting a through connection of the circuit elements.
The circuit elements, for example, may consist of a transistor, hereinafter called a memory transistor, and a memory resistor connected in the emitter circuit of the memory transistor. The base of the memory transistor may be connected to a row line, the collector may be connected to an operating voltage, and the memory resistor may connect the emitter to a column line. If the stored information is to be read out of a specific storage element, the assigned column line and the assigned row line must be activated.
According to whether the storage resistor is not interrupted, a current or no current flows over the collector-emitter path. This current continues to flow on the assigned column line to a constant current source. In addition, a read transistor is connected to the column line, which is in turn connected to a read amplifier. If the storage resistor is not interrupted, the current of the constant current source flows over the storage resistor and the storage transistor. However, if the storage resistor is interrupted, the constant current of the constant current source flows over the read transistor. According to whether the constant current flows over the storage resistor or over the read transistor, the read transistor emits a corresponding voltage, which is amplified by the read amplifier.
In storage matrices of this type, however, the access time is also particularly dependent upon the potential on the column lines. While defined potentials are applied to a selected column line, the unselected column lines accept the potential of the selected row lines for a long period of time, i.e. the unselected column lines are slowly charged to the potential of the selected row line via the interconnecting storage elements. This causes the potential to have different values prior to access, depending on how often a column line is used during the reading operation. Because of this, however, the access times to the information in the storage matrix will be different.